SERVICES

Three engineering disciplines, delivered by one team.

Certification work that lets a safety-critical product ship, the firmware and operating system that run on it, and the hardware and FPGA engineering that make it real — sourced separately or together, and designed from the safety concept outward.

Three suppliers compared with one engineering team The usual arrangement splits a safety-critical programme across a safety consultancy, a hardware design firm and a software house. Each boundary is a place where a requirement is re-interpreted and where an assessment finding becomes a dispute about scope. norxs holds the whole chain, so there is no boundary to renegotiate. THE USUAL ARRANGEMENT Safety consultancy writes the safety case Hardware design firm draws the board Software house writes the firmware requirement re-interpreted a finding becomes a scope dispute WITH norxs Safety concept Hardware FPGA Firmware Application & OS one scope · one DIA · one party answering the assessor
Every supplier boundary is a place where a requirement is re-read and a finding loses an owner
01 — CORE PRACTICE

Functional Safety & Cybersecurity Engineering

We build and defend the safety and security case for systems where failure isn't an option — from initial HARA through audit-ready deliverable packages.

01

HARA & Safety Case Development

Hazard analysis, ASIL determination, and safety case construction under ISO 26262.

02

TARA & Cybersecurity Management Systems

Threat analysis and CSMS build-out to ISO/SAE 21434 and UN R155/156 for Type Approval.

03

Software Safety Lifecycle

ISO 26262-6 aligned development process and ASPICE assessment support.

04

SOTIF Analysis

Performance-limitation and misuse analysis under ISO 21448 for systems with autonomous functions.

05

Traceability & Audit Support

Requirement-to-deliverable traceability matrices built for third-party assessment.

ISO 26262IEC 61508ISO/SAE 21434 UN R155 / R156ASPICEISO 21448
Plot of PMHF and SPFM against diagnostic coverage, showing that the SPFM target binds first
Design analysis: both ASIL D hardware metrics against the same diagnostic coverage. Assumptions are printed on the figure.
02 — CORE PRACTICE

Software & Firmware Engineering

The embedded code that runs the hardware — control algorithms, drivers, and the safety-lifecycle discipline behind them, written by the same team that owns the safety case.

01

Embedded Firmware Development

Bare-metal and RTOS firmware for motor control, power electronics, and sensing platforms.

02

Real-Time Control Algorithms

Field-oriented motor control, power conversion, and sensor fusion algorithms implemented and validated on target hardware.

03

Board Support Package & Drivers

Bootloaders, peripheral drivers, and hardware abstraction layers built for a certification-ready codebase.

04

MISRA C Compliant Development

Coding-standard enforcement and static analysis integrated from the first commit, not retrofitted before an audit.

05

Unit Test & Structural Coverage

Unit test and MC/DC coverage evidence aligned to ISO 26262-6, produced alongside the code — not after it.

Embedded C/C++RTOSMISRA C:2023 Real-Time ControlHIL Verification
Distribution of end-to-end fault reaction time against a 10 millisecond fault tolerant time interval
Design analysis: fault reaction time for a fixed-period supervisor task, statistical distribution against the deterministic bound.
03 — NEW IN 2026

Hardware & Electronics Design (NRE)

Outsourced electronics design engagements for teams that need senior hardware engineering without building an in-house team — schematic capture through prototype bring-up.

01

Schematic Capture & Component Selection

Architecture definition, part selection, and lifecycle/second-source risk review.

02

PCB Layout

High-speed digital, mixed-signal, and power layout — stack-up definition, signal integrity, and thermal review.

03

Prototype Bring-Up & Validation

Bench bring-up, functional test, and root-cause debug on first-article boards.

04

DFM / DFT Review

Design-for-manufacture and design-for-test review ahead of production release.

05

EMC Pre-Compliance Design

Layout and filtering decisions made up front to reduce pre-compliance test cycles.

Schematic CapturePCB LayoutSignal Integrity DFM / DFTEMC Pre-Compliance
Maximum CAN bus length against sample point placement for four bit rates
Design analysis: the arbitration-phase propagation budget behind a bus topology decision.
HOW WE ENGAGE

Three ways to bring us in.

Scoped Assessment

Fixed scope, fixed price

A defined deliverable — a HARA, a TARA, a schematic review — priced and scheduled up front. Good for a single gap you need closed.

Embedded Engineering

Our engineer, your program

A core-team engineer works inside your program for its duration, alongside your team, on your cadence.

Program Ownership

We run the workstream

We own a safety case, a CSMS build-out, or a hardware design end to end and deliver it complete.

Have a project in mind?

Tell us what you're building — we'll tell you honestly whether it's a fit.

Get in Touch